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Towards Practical Fabrication Stage Attacks Using Interrupt-Resilient Hardware Trojans
March 19, 2024, 4:10 a.m. | Athanasios Moschos, Fabian Monrose, Angelos D. Keromytis
cs.CR updates on arXiv.org arxiv.org
Abstract: We introduce a new class of hardware trojans called interrupt-resilient trojans (IRTs). Our work is motivated by the observation that hardware trojan attacks on CPUs, even under favorable attack scenarios (e.g., an attacker with local system access), are affected by unpredictability due to non-deterministic context switching events. As we confirm experimentally, these events can lead to race conditions between trigger signals and the CPU events targeted by the trojan payloads (e.g., a CPU memory access), …
access arxiv attack attacker attacks called class context context switching cpus cs.cr fabrication hardware local non resilient stage system trojan trojans under work
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