May 11, 2022, 1:20 a.m. | Mukta Debnath, Animesh Basak Chowdhury, Debasri Saha, Susmita Sur-Kolay

cs.CR updates on arXiv.org arxiv.org

Recent success in high-level synthesis ( HLS ) has enabled designing complex
hardware with better abstraction and configurability in high-level languages
(e.g. SystemC/C++) compared to low-level register-transfer level ( RTL )
languages. Nevertheless, verification and testing HLS designs are challenging
and arduous due to their object oriented nature and inherent concurrency. Test
engineers aim to generate qualitative test-cases satisfying various code
coverage metrics to ensure minimal presence of bugs in a design. Recent works
have demonstrated the success of software …

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