Feb. 19, 2024, 5:11 a.m. | Hasan Hassan, Ataberk Olgun, A. Giray Yaglikci, Haocong Luo, Onur Mutlu

cs.CR updates on arXiv.org arxiv.org

arXiv:2207.13358v5 Announce Type: replace-cross
Abstract: The memory controller is in charge of managing DRAM maintenance operations (e.g., refresh, RowHammer protection, memory scrubbing) in current DRAM chips. Implementing new maintenance operations often necessitates modifications in the DRAM interface, memory controller, and potentially other system components. Such modifications are only possible with a new DRAM standard, which takes a long time to develop, leading to slow progress in DRAM systems.
In this paper, our goal is to 1) ease, and thus accelerate, …

arxiv autonomous charge chips components controller cost cs.ar cs.cr current dram framework interface low maintenance memory modifications operations protection rowhammer system

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