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Securing Cloud FPGAs Against Power Side-Channel Attacks: A Case Study on Iterative AES. (arXiv:2307.02569v1 [cs.CR])
cs.CR updates on arXiv.org arxiv.org
The various benefits of multi-tenanting, such as higher device utilization
and increased profit margin, intrigue the cloud field-programmable gate array
(FPGA) servers to include multi-tenanting in their infrastructure. However,
this property makes these servers vulnerable to power side-channel (PSC)
attacks. Logic designs such as ring oscillator (RO) and time-to-digital
converter (TDC) are used to measure the power consumed by security critical
circuits, such as advanced encryption standard (AES). Firstly, the existing
works require higher minimum traces for disclosure (MTD). Hence, …
aes array attacks benefits case channel cloud device fpga higher infrastructure logic power profit ring servers side-channel side-channel attacks study vulnerable