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Optimization and Amplification of Cache Side Channel Signals. (arXiv:2303.00122v1 [cs.CR])
cs.CR updates on arXiv.org arxiv.org
In cache-based side channel attacks, an attacker infers information about the
victim based on the presence, or lack thereof, of one or more cachelines.
Determining a cacheline's presence, which we refer to as "reading the signal",
typically requires testing the access time of the line using a suitably high
precision timer. In this paper we introduce novel gadgets which leverage CPU
speculation to enable modification of these signals, before they are read, for
a variety of purposes. First, these gadgets …
access amplification attacks cache channel cpu enable gadgets high information modification novel optimization signal signals testing victim