Evolutionary Large Language Models for Hardware Security: A Comparative Survey

arXiv:2404.16651v1 Announce Type: new
Abstract: Automating hardware (HW) security vulnerability detection and mitigation during the design phase is imperative for two reasons: (i) It must be before chip fabrication, as post-fabrication fixes can be costly or even impractical; (ii) The size and complexity of modern HW raise concerns about unknown vulnerabilities compromising CIA triad. While Large Language Models (LLMs) can revolutionize both HW design and testing processes, within the semiconductor context, LLMs can be harnessed to automatically rectify security-relevant vulnerabilities …

arxiv can chip complexity cs.cr design detection fabrication fixes hardware hardware security language language models large mitigation security security vulnerability size survey vulnerability vulnerability detection