Efficiently Hardening SGX Enclaves against Memory Access Pattern Attacks via Dynamic Program Partitioning. (arXiv:2212.12656v1 [cs.CR])

Intel SGX is known to be vulnerable to a class of practical attacks
exploiting memory access pattern side-channels, notably page-fault attacks and
cache timing attacks. A promising hardening scheme is to wrap applications in
hardware transactions, enabled by Intel TSX, that return control to the
software upon unexpected cache misses and interruptions so that the existing
side-channel attacks exploiting these micro-architectural events can be
detected and mitigated. However, existing hardening schemes scale only to
small-data computation, with a typical working …

access attacks dynamic hardening memory program sgx