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Compress: Reducing Area and Latency of Masked Pipelined Circuits
Oct. 17, 2023, 6:24 a.m. |
IACR News www.iacr.org
ePrint Report: Compress: Reducing Area and Latency of Masked Pipelined Circuits
Gaëtan Cassiers, Barbara Gigerl, Stefan Mangard, Charles Momin, Rishub Nagpal
Masking is an effective countermeasure against side-channel attacks. It replaces every logic gate in a computation by a gadget that performs the operation over secret sharings of the circuit's variables. When masking is implemented in hardware, care should be taken to protect against leakage from glitches, which could otherwise undermine the security of masking. This is generally done by …
area attacks channel computation eprint report gadget latency logic masking report secret side-channel side-channel attacks
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