April 21, 2023, 1:10 a.m. | Quancheng Wang, Ming Tang, Han Wang, Yuzhe Gu

cs.CR updates on arXiv.org arxiv.org

Caches are used to reduce the speed differential between the CPU and memory
to improve the performance of modern processors. However, attackers can use
contention-based cache timing attacks to steal sensitive information from
victim processes through carefully designed cache eviction sets. And L1 data
cache attacks are widely exploited and pose a significant privacy and
confidentiality threat. Existing hardware-based countermeasures mainly focus on
cache partitioning, randomization, and cache line flushing, which unfortunately
either incur high overhead or can be circumvented …

attackers attacks cache confidentiality countermeasures cpu data exploited focus hardware high information memory performance privacy processes processors randomization sensitive information speed steal threat victim

SOC 2 Manager, Audit and Certification

@ Deloitte | US and CA Multiple Locations

Information Security Engineers

@ D. E. Shaw Research | New York City

Intermediate Security Engineer, (Incident Response, Trust & Safety)

@ GitLab | Remote, US

Journeyman Cybersecurity Triage Analyst

@ Peraton | Linthicum, MD, United States

Project Manager II - Compliance

@ Critical Path Institute | Tucson, AZ, USA

Junior System Engineer (m/w/d) Cyber Security 1

@ Deutsche Telekom | Leipzig, Deutschland