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BackCache: Mitigating Contention-Based Cache Timing Attacks by Hiding Cache Line Evictions. (arXiv:2304.10268v1 [cs.CR])
cs.CR updates on arXiv.org arxiv.org
Caches are used to reduce the speed differential between the CPU and memory
to improve the performance of modern processors. However, attackers can use
contention-based cache timing attacks to steal sensitive information from
victim processes through carefully designed cache eviction sets. And L1 data
cache attacks are widely exploited and pose a significant privacy and
confidentiality threat. Existing hardware-based countermeasures mainly focus on
cache partitioning, randomization, and cache line flushing, which unfortunately
either incur high overhead or can be circumvented …
attackers attacks cache confidentiality countermeasures cpu data exploited focus hardware high information memory performance privacy processes processors randomization sensitive information speed steal threat victim