BackCache: Mitigating Contention-Based Cache Timing Attacks by Hiding Cache Line Evictions

arXiv:2304.10268v4 Announce Type: replace
Abstract: Caches are used to reduce the speed differential between the CPU and memory to improve the performance of modern processors. However, attackers can use contention-based cache timing attacks to steal sensitive information from victim processes through carefully designed cache eviction sets. And L1 data cache attacks are widely exploited and pose a significant privacy and confidentiality threat. Existing hardware-based countermeasures mainly focus on cache partitioning, randomization, and cache line flushing, which unfortunately either incur high …

arxiv attackers attacks cache can cpu cs.ar cs.cr data information line memory performance processes processors sensitive sensitive information speed steal victim