Jan. 2, 2024, 4:10 a.m. | Peter Sovietov

cs.CR updates on arXiv.org arxiv.org

Processors with extensible instruction sets are often used today as
programmable hardware accelerators for various domains. When extending RISC-V
and other similar extensible processor architectures, the task of designing
specialized instructions arises. This task can be solved automatically by using
instruction synthesis algorithms. In this paper, we consider algorithms that
can be used in addition to the known approaches and improve the synthesized
instruction sets by recomputing common operations (the result of which is
consumed by multiple operations) of a …

algorithms architectures domains hardware processor processors risc-v synthesized task today

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